Tuning Your CPC945 Memory Controller

Posted by IdaAshley on Nov 22, 2006 6:09 AM EDT
IBM/developerWorks; By Neil Leeder 		Mail this story
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Explore the register-level details of tuning the CPC945's double data rate 2 (DDR2) memory controller for specific hardware implementations. Author Neil Leeder introduces nifty self-calibrating hardware features of the CPC945 to help you learn how to operate reliably with different memory configurations.

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