Verilog simulator becomes open-source item
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Santa Cruz, Calif. — In the 1990s, Elliot Mednick pioneered low-cost Verilog simulation. Now he's made his VeriWell simulator a free, open-source offering available through the Sourceforge Web site.
"I'm not doing this for my personal gain," said Mednick, who today is a principal engineer at behavioral synthesis provider Bluespec Inc. "I just think people will find it useful, so why hold on to it?"
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